Freescale Semiconductor /MKV58F24 /MCG /C6

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as C6

PLLS=0, CME0=0, VDIV=0, LOLIE0=0

Description

MCG Control 6 Register

Fields

VDIV	VCO Divider 0 (0): Multiply Factor is 16 1 (1): Multiply Factor is 17 2 (2): Multiply Factor is 18 3 (3): Multiply Factor is 19 4 (4): Multiply Factor is 20 5 (5): Multiply Factor is 21 6 (6): Multiply Factor is 22 7 (7): Multiply Factor is 23 8 (8): Multiply Factor is 24 9 (9): Multiply Factor is 25 10 (10): Multiply Factor is 26 11 (11): Multiply Factor is 27 12 (12): Multiply Factor is 28 13 (13): Multiply Factor is 29 14 (14): Multiply Factor is 30 15 (15): Multiply Factor is 31 16 (16): Multiply Factor is 32 17 (17): Multiply Factor is 33 18 (18): Multiply Factor is 34 19 (19): Multiply Factor is 35 20 (20): Multiply Factor is 36 21 (21): Multiply Factor is 37 22 (22): Multiply Factor is 38 23 (23): Multiply Factor is 39 24 (24): Multiply Factor is 40 25 (25): Multiply Factor is 41 26 (26): Multiply Factor is 42 27 (27): Multiply Factor is 43 28 (28): Multiply Factor is 44 29 (29): Multiply Factor is 45 30 (30): Multiply Factor is 46 31 (31): Multiply Factor is 47
CME0	Clock Monitor Enable 0 (0): External clock monitor is disabled for OSC0. 1 (1): External clock monitor is enabled for OSC0.
PLLS	PLL Select 0 (0): FLL is selected. 1 (1): PLL is selected (PRDIV 0 need to be programmed to the correct divider to generate a PLL reference clock in the range of 8-16 MHz prior to setting the PLLS bit).
LOLIE0	Loss of Lock Interrrupt Enable 0 (0): No interrupt request is generated on loss of lock. 1 (1): Generate an interrupt request on loss of lock.

Links

() ()